1. Field of the Invention
The present invention relates to a phase detector for generating a measurement signal indicating the extent to which the actual distances between data pulses generated for serial data transmission and the detection times determined by a detection clock differ from a required distance.
2. Description of the Prior Art
European Patent Application No. 54,322 discloses a phase detector for generating a measurement signal indicating the extent to which the actual distances between data pulses generated for serial data transmission and the detection times determined by a detection clock differ from a required distance. In this phase detector, a reference pulse is delivered whose width is equal to half the clock cycle. The reference signal is fed to a controlled current source which generates a first current. A detection signal is fed to a second controlled current source which generates a second current whose value should equal the first current if the actual distance equals the required distance. The first current is subtracted from the second current to obtain a differential current which is a measure of the difference between the actual distance and the required distance.
To generate the reference signal in the phase detector of European Patent Application No. 54,322, the output of a first flipflop is connected to the input of a second flipflop. The second flipflop is controlled by a clock signal 180.degree. phase-shifted with respect to the phase of the clock signal which controls the first flipflop. Thus, over a time period equal to half the cycle of the clock signal, the second flipflop output signal is shifted with respect to the first flipflop output signal. Both the output of the first flipflop and the output of the second flipflop are fed to an exclusive OR-gate which generates a reference pulse at each flank of a data pulse.
In this device, the width of the reference pulse depends on the duty-cycle of the clock signal. In the case of a reference signal having a pulse width equal to half the cycle of the clock signal, a duty-cycle of 50% is required. It would be desirable, however, to provide a phase detector whose proper operation is independent of the duty-cycle of the clock signal supplied.
Similary, in European Patent Application No. 10,959, an output of a first flipflop and an output of a second flipflop are fed to an exclusive OR-gate before being fed to additional circuit elements which include another exclusive OR-gate and a flipflop which can toggle on a clock pulse. As shown in the timing diagram of FIG. 3, the output of the exclusive OR-gate is dependent upon and related to the duty-cycle of the clock signal. Thus, this device not only has the disadvantages of clock duty-cycle dependency but it also requires more circuit elements.